Photovoltaics (PV) or solar cells are devices which convert sunlight into direct current (DC) electrical power. A typical PV cell includes a p type silicon wafer, substrate or sheet typically less than about 0.3 mm thick with a thin layer of n-type silicon on top of a p-type region formed in a substrate. The generated voltage, or photo-voltage, and generated current by the photovoltaic device are dependent on the material properties of the p-n junction and the surface area of the device. When exposed to sunlight (consisting of energy from photons), pairs of free electrons and holes are generated in the silicon. The electric field formed across the depletion region of p-n junction separates the free electrons and holes, creating a voltage. A circuit from n-side to p-side allows the flow of electrons when the PV cell is connected to an electrical load. Electrical power is the product of the voltage times the current generated as the electrons and holes move through an external load and eventually recombine. Solar cells generate a specific amount of power and cells are tiled into modules sized to deliver the desired amount of system power. Solar modules are created by connecting a number of solar cells which are then joined into panels with specific frames and connectors.
It has been estimated that more than 95% of all photovoltaic modules are silicon wafer based. However, other types of modules such as thin-film based solar cells are being explored because of their promise of lower cost, albeit while providing lower efficiencies than silicon based modules. Therefore, reducing the cost of silicon wafer based photovoltaic modules, particularly their manufacturing costs, is a major challenge in keeping such modules commercially viable.
In order to meet these challenges, the following solar cell processing requirements generally need to be met: 1) the consumption of silicon must be reduced (e.g., thinner substrates, reduction of manufacturing waste), 2) the cost of ownership (COO) for substrate fabrication equipment needs to be improved (e.g., high system throughput, high machine up-time, inexpensive machines, inexpensive consumable costs), 3) the substrate size needs to be increased (e.g., reduce processing per watt peak, Wp) and 4) the quality of the silicon substrates needs to be sufficient to produce highly efficient solar cells. There are a number of solar cell silicon substrate, or solar cell wafer, manufacturing technologies that are under development to meet the requirement of low silicon consumption in combination with a low COO. Due to the pressure to reduce manufacturing costs and due to the reduced demands on substrate characteristics, such as surface morphology, contamination, and thickness variation, a number of dedicated substrate manufacturing lines specifically designed to produce substrates for solar cells have been established. In these respects solar cell substrates differ in many respects to typical semiconductor wafers.
Crystalline silicon is the material from which the vast majority of all solar cells are currently manufactured. Monocrystalline and multicrystalline silicon form the two principle variants of the silicon material used for solar cells. While monocrystalline silicon is usually pulled as a single crystal from a silicon melt using the Czochralski (CZ) process, there are a number of production processes for multicrystalline silicon. Typical multicrystalline silicon processes are block crystallization processes, in which the silicon substrates are obtained by forming and then sawing a solid polycrystalline silicon block, film-drawing processes, in which the substrates are drawn or cast in their final thickness as a silicon film is pulled from a molten material, and sintering processes in which the substrates are formed by melting a silicon powder. Examples of these substrate fabrication process are the EFG process (Edge-defined Film-fed Growth) (e.g., U.S. Pat. No. 5,106,763), the RGS (Ribbon Growth on Substrate) process (e.g., U.S. Pat. No. 4,670,096, U.S. Pat. No. 5,298,109, DE 4,105,910 A1) and the SSP ribbon process (Silicon Sheets from Powder) (e.g., U.S. Pat. No. 5,336,335, U.S. Pat. No. 5,496,446, U.S. Pat. No. 6,111,191, and U.S. Pat. No. 6,207,891). For high speed ribbon type silicon substrate forming processes to be viable, the challenge is to reach sufficient substrate quality and solar cell efficiency to provide low cost solar electricity.
Of the above polycrystalline processes, the most promising substrate manufacturing technologies include those where liquid silicon is directly crystallized in the form of a silicon substrate or ribbon (so-called ribbon technologies). Co-pending application Ser. No. 11/325,089, the contents of which are incorporated herein reference, advanced the state of the art of silicon-based photovoltaic modules by disclosing an apparatus and method for fabricating large surface area polycrystalline silicon sheets. An example aspect of that invention is that molten silicon is sprayed through spray nozzles suspended over a sheet support platen. Drops and ligaments from the liquid spray rapidly solidify on the platen and build up to form a polycrystalline silicon sheet.
FIG. 1A illustrates a silicon sheet 20 that is formed as described in the process above. It can be seen that (although exaggerated somewhat for purposes of illustration) sheet 20 includes many overlapping solidified silicon drops and/or ligaments 22. As further shown in FIG. 1B, each of these drops or ligaments 22 may have their own crystalline structure comprising small grains 24. Similarly, silicon sheets obtained using other ribbon technologies have many small grains, which potentially limit their use in solar cell applications. This is further illustrated in FIG. 1A. As shown in FIG. 1A, when sheet 20 is further processed to form a solar cell and used to provide power to a load RL coupled thereto or to a photovoltaic module comprising sheet 20, the small grains 24, particularly those having grain boundaries normal to the direction of charge carrier flow, will decrease the amount of current produced, and thus limit the efficiency of the module.
To improve the film properties, typically the sheet is recrystallized in a process following the formation process. In one example, this is done by moving a molten zone along the length of the sheet. However, this process is slow and also introduces stress in the film, among other problems. Moreover, such recrystallization processes cannot reliably improve grain structure with respect to certain desired properties, such as the reduction of grain boundaries normal to the direction of charge carrier flow in a solar cell. In related arts, a process called solid phase crystallization (SPC) is known in which film is crystallized without melting it. However, SPC processing is also slow and not as effective in reducing film defects such as dislocations.
Therefore, there remains a need in the art for a recrystallization process that can efficiently and reliably produce a silicon film or sheet with acceptable film properties.